Page 138 - 《软件学报》2024年第6期
P. 138

2714                                                       软件学报  2024  年第  35  卷第  6  期


                      binary  translator  on  multicores.  In:  Proc.  of  the  10th  Int’l  Symp.  on  Code  Generation  and  Optimization.  San  Jose:  Association  for
                      Computing Machinery, 2012. 104–113. [doi: 10.1145/2259016.2259030]
                 [21]  Yue F, Pang JM, Han XS, Cui JX. An improved code cache management scheme from I386 to Alpha in dynamic binary translation. In:
                      Proc. of the 2nd Int’l Conf. on Computer Modeling and Simulation. Sanya: IEEE Computer Society, 2010. 321–324. [doi: 10.1109/
                      iccms.2010.97]
                 [22]  Scott K, Kumar N, Velusamy S, Childers B, Davidson JW, Soffa ML. Retargetable and reconfigurable software dynamic translation. In:
                      Proc.  of  the  2003  Int’l  Symp.  on  Code  Generation  and  Optimization.  San  Francisco:  IEEE,  2003.  36–47.  [doi: 10.1109/CGO.2003.
                      1191531]
                 [23]  Hiser JD, Williams D, Hu W, Davidson JW, Mars J, Childers BR. Evaluating indirect branch handling mechanisms in software dynamic
                      translation systems. In: Proc. of the 2007 Int’l Symp. on Code Generation and Optimization (CGO 2007). San Jose: IEEE, 2007. 61–73.
                      [doi: 10.1109/CGO.2007.10]
                 [24]  Liu  XN.  Research  on  key  technologies  of  binary  translation  for  the  domestic  CPU  [Ph.D.  Thesis].  Zhengzhou:  PLA  Information
                      Engineering University, 2014 (in Chinese with English abstract).
                 [25]  Fu SY, Hong DY, Wu JJ, Liu PF, Hsu WC. SIMD code translation in an enhanced HQEMU. In: Proc. of the 21st IEEE Int’l Conf. on
                      Parallel and Distributed Systems. Melbourne: IEEE, 2015. 507–514. [doi: 10.1109/icpads.2015.70]
                 [26]  Shi Q, Zhao RC. Floating point optimization based on binary translation system QEMU. In: Proc. of the 2nd Workshop on Advanced
                      Research and Technology in Industry Applications. Atlantis Press, 2016. 1338–1343. [doi: 10.2991/wartia-16.2016.278]
                 [27]  Wang  WW.  Helper  function  inlining  in  dynamic  binary  translation.  In:  Proc.  of  the  30th  ACM  SIGPLAN  Int’l  Conf.  on  Compiler
                      Construction. Association for Computing Machinery, 2021. 107–118. [doi: 10.1145/3446804.3446851]
                 [28]  Wang ZG, Liu R, Chen YF, Wu X, Chen HB, Zhang WH, Zang BY. COREMU: A scalable and portable parallel full-system emulator.
                      In:  Proc.  of  the  16th  ACM  Symp.  on  Principles  and  Practice  of  Parallel  Programming.  San  Antonio:  Association  for  Computing
                      Machinery, 2011. 213–222. [doi: 10.1145/1941553.1941583]
                 [29]  Ding JH, Chang PC, Hsu WC, Chung YC. PQEMU: A parallel system emulator based on QEMU. In: Proc. of the 17th IEEE Int’l Conf.
                      on Parallel and Distributed Systems. Tainan: IEEE Computer Society, 2011. 276–283. [doi: 10.1109/icpads.2011.102]
                 [30]  Poeplau S, Francillon A. SymQEMU: Compilation-based symbolic execution for binaries. In: Proc. of the 2021 Network and Distributed
                      Systems Security (NDSS) Symp. 2021. [doi: 10.14722/ndss.2021.24118]
                 [31]  Zhao  ZY,  Jiang  Z,  Liu  XM,  Gong  XL,  Wang  WW,  Yew  PC.  DQEMU:  A  scalable  emulator  with  retargetable  DBT  on  distributed
                      platforms.  In:  Proc.  of  the  49th  Int’l  Conf.  on  Parallel  Processing.  Edmonton:  Association  for  Computing  Machinery,  2020.  7.
                      [doi: 10.1145/3404397.3404403]
                 [32]  Luk CK, Cohn R, Muth R, Patil H, Klauser A, Lowney G, Wallace S, Reddi VJ, Hazelwood K. Pin: Building customized program
                      analysis  tools  with  dynamic  instrumentation.  In:  Proc.  of  the  2005  ACM  SIGPLAN  Conf.  on  Programming  Language  Design  and
                      Implementation. Chicago: Association for Computing Machinery, 2005. 190–200. [doi: 10.1145/1065010.1065034]
                 [33]  Zeng JY, Fu YC, Lin ZQ. PEMU: A pin highly compatible out-of-VM dynamic binary instrumentation framework. In: Proc. of the 11th
                      ACM  SIGPLAN/SIGOPS  Int’l  Conf.  on  Virtual  Execution  Environments.  Istanbul:  Association  for  Computing  Machinery,  2015.
                      147–160. [doi: 10.1145/2731186.2731201]
                 [34]  Li ML, Pang JM, Yue F, Liu FD, Wang J, Tan J. Enhancing dynamic binary translation in mobile computing by leveraging polyhedral
                      optimization. Wireless Communications and Mobile Computing, 2021, 2021: 6611867. [doi: 10.1155/2021/6611867]
                 [35]  Dolan-Gavitt B, Hodosh J, Hulin P, Leek T, Whelan R. Repeatable reverse engineering with PANDA. In: Proc. of the 5th Program
                      Protection and Reverse Engineering Workshop. Los Angeles: Association for Computing Machinery, 2015. 4. [doi: 10.1145/2843859.
                      2843867]
                 [36]  Guan HB, Ma RH, Yang HB, Yang YD, Liu L, Chen Y. MTCrossBit: A dynamic binary translation system based on multithreaded
                      optimization. Science China Information Sciences, 2011, 54(10): 2064–2078. [doi: 10.1007/s11432-011-4414-5]
                 [37]  D’antras A. The Tango binary translation technology. 2019. https://www.amanieusystems.com/technology
                 [38]  Engelke A, Schulz M. Instrew: Leveraging LLVM for high performance dynamic binary instrumentation. In: Proc. of the 16th ACM
                      SIGPLAN/SIGOPS Int’l Conf. on Virtual Execution Environments. Lausanne: Association for Computing Machinery, 2020. 172–184.
                      [doi: 10.1145/3381052.3381319]
                 [39]  Ryan & Scott. FEX-Emu. 2022. https://fex-emu.org/
                 [40]  Intel. Intel core processors and intel bridge technology unleash Windows 11 experience. 2021. https://www.intel.com/content/www/us/
                      en/newsroom/news/intel-tech-unleashes-windows-experience.html
                 [41]  Rocha  RCO,  Sprokholt  D,  Fink  M,  Gouicem  R,  Spink  T,  Chakraborty  S,  Bhatotia  P.  Lasagne:  A  static  binary  translator  for  weak
   133   134   135   136   137   138   139   140   141   142   143