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屈晟 等: 面向 RISC-V 指令集多样性的兼容性感知多层级构建方法 2365
的双路径编译机制, 能够在构建过程中自动提取并同步生成 LLVM IR 文件, 为后续跨平台部署奠定基础. 为支持
软件分发与生态集成, RuyiBuild 构建了完整的 LLVM IR 部署与 RPM 包管理机制, 并通过自动镜像与一致性维
护实现 IR 与传统 ELF 包的协同发布. 此外, 本文提出了一种基于动态模板的指令集扩展识别与微架构优化方法,
能够根据目标平台的硬件特性进行精准识别与动态重构, 从而实现细粒度的编译优化. 为进一步提升系统适应
性, RuyiBuild 在客户端设计了资源感知的转换调度机制, 保障转换过程对用户体验的最小影响; 同时在云端构建
了自动化批量转换与优化流程, 实现多架构环境下的高效部署. 通过编译拦截、IR 文件管理、部署集成与分发
优化的全流程构建, RuyiBuild 实现了兼容性与优化能力兼具的跨平台软件构建范式, 克服了现有方案粒度控制
粗、维护成本高与构建系统侵入性强等核心难题. RuyiBuild 工具链不仅为当前 RISC-V 平台上的软件构建与部
署提供了可行、易用、高效的新范式, 更为未来跨架构软件分发与自动优化系统的研究提供了重要的参考路径.
针对部分 CPU 在启用扩展指令集后性能反降的现象, 我们将继续探索基于硬件特性感知的指令集参数精细微调
机制, 结合程序概要分析等技术优化指令集与应用负载的匹配度; 研究人工智能驱动的转换控制策略; 实现动态
自适应的转换决策, 构建可执行程序的跨平台优化与分发框架, 完善全类型软件的适配能力; 探索面向商业闭源
软件的适配路径, 在保障知识产权的前提下, 设计安全可控的 IR 转换与优化机制, 推动技术在产业生态中的规模
化应用.
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