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龚子睿 等: FBS-uBlock: 灵活的 uBlock 算法比特切片优化方法 4843
[20] Papapagiannopoulos K. High throughput in slices: The case of PRESENT, PRINCE and KATAN64 ciphers. In: Proc. of the 10th Int’l
Workshop on Radio Frequency Identification: Security and Privacy Issues. Oxford: Springer, 2014. 137–155. [doi: 10.1007/978-3-319-
13066-8_9]
[21] Zhang XC, Guo H, Zhang XY, Wang C, Liu JW. Fast software implementation of SM4. Journal of Cryptologic Research, 2020, 7(6):
799–811 (in Chinese with English abstract). [doi: 10.13868/j.cnki.jcr.000407]
[22] Wang L, Gong Z, Liu Z, Chen JH, Hao JF. Fast software implementation of SM4 based on tower field. Journal of Cryptologic Research,
2022, 9(6): 1081–1098 (in Chinese with English abstract). [doi: 10.13868/j.cnki.jcr.000569]
[23] Chen C, Guo H, Wang C, Liu YH, Liu JW. A fast software implementation of SM4 based on composite fields. Journal of Cryptologic
Research, 2023, 10(2): 289–305 (in Chinese with English abstract). [doi: 10.13868/j.cnki.jcr.000594]
[24] Rudra A, Dubey PK, Jutla CS, Kumar V, Rao JR, Rohatgi P. Efficient Rijndael encryption implementation with composite field
arithmetic. In: Proc. of the 3rd Int’l Workshop on Cryptographic Hardware and Embedded Systems (CHES 2001). Paris: Springer, 2001.
171–184. [doi: 10.1007/3-540-44709-1_16]
[25] Rebeiro C, Selvakumar D, Devi ASL. Bitslice implementation of AES. In: Proc. of the 5th Int’l Conf. on Cryptology and Network
Security. Suzhou: Springer, 2006. 203–212. [doi: 10.1007/11935070_14]
[26] Matsui M, Nakajima J. On the power of Bitslice implementation on Intel Core2 processor. In: Proc. of the 9th Int’l Workshop on
Cryptographic Hardware and Embedded Systems - CHES 2007. Vienna: Springer, 2007. 121–134. [doi: 10.1007/978-3-540-74735-2_9]
[27] Schwabe P, Stoffelen K. All the AES you need on Cortex-M3 and M4. In: Proc. of the 23rd Int’l Conf. on Selected Areas in
Cryptography (SAC 2016). St. John’s: Springer, 2017. 180–194. [doi: 10.1007/978-3-319-69453-5_10]
[28] Xu RQ, Xiang ZJ, Lin D, Zhang SS, He DB, Zeng XY. High-throughput block cipher implementations with SIMD. Journal of
Information Security and Applications, 2022, 70: 103333. [doi: 10.1016/j.jisa.2022.103333]
[29] Nishikawa N, Amano H, Iwai K. Implementation of Bitsliced AES encryption on CUDA-enabled GPU. In: Proc. of the 11th Int’l Conf.
on Network and System Security. Helsinki: Springer, 2017. 273–287. [doi: 10.1007/978-3-319-64701-2_20]
[30] Hajihassani O, Monfared SK, Khasteh SH, Gorgin S. Fast AES implementation: A high-throughput bitsliced approach. IEEE Trans. on
Parallel and Distributed Systems, 2019, 30(10): 2211–2222. [doi: 10.1109/TPDS.2019.2911278]
[31] Miao X, Guo C, Wang MQ, Wang WJ. How fast can SM4 be in software? In: Proc. of the 18th Int’l Conf. on Information Security and
Cryptology. Beijing: Springer, 2023. 3–22. [doi: 10.1007/978-3-031-26553-2_1]
[32] Miao X. Fast software implementations of SM4 [MS. Thesis]. Jinan: Shandong University, 2023 (in Chinese with English abstract).
[doi: 10.27272/d.cnki.gshdu.2023.003953]
[33] Wang C, Ding Y, Huang CL, Song LT. Bitsliced optimization of SM4 algorithm with the SIMD instruction set. Journal of Computer
Research and Development, 2024, 61(8): 2097–2109 (in Chinese with English abstract). [doi: 10.7544/issn1000-1239.202220531]
[34] Adomnicai A, Peyrin T. Fixslicing AES-like ciphers: New bitsliced AES speed records on ARM-cortex M and RISC-V. IACR Trans. on
Cryptographic Hardware and Embedded Systems, 2021, 2021(1): 402–425. [doi: 10.46586/tches.v2021.i1.402-425]
[35] Banik S, Pandey SK, Peyrin T, Sasaki Y, Sim SM, Todo Y. GIFT: A small present: Towards reaching the limit of lightweight encryption.
In: Proc. of the 19th Int’l Conf. on Cryptographic Hardware and Embedded Systems (CHES 2017). Taipei: Springer, 2017. 321–345. [doi:
10.1007/978-3-319-66787-4_16]
[36] Dobraunig C, Eichlseder M, Mendel F, Schläffer M. ASCON v1.2: Lightweight authenticated encryption and hashing. Journal of
Cryptology, 2021, 34(3): 33. [doi: 10.1007/s00145-021-09398-9]
[37] Jia KT, Dong XY, Wei CM, Li Z, Zhou HB, Cong TS. On the design of block cipher FESH. Journal of Cryptologic Research, 2019, 6(6):
713–726 (in Chinese with English abstract). [doi: 10.13868/j.cnki.jcr.000336]
[38] Zhang WT, Ji FL, Ding TY, Yang BH, Zhao XF, Xiang ZJ, Bao ZZ, Liu LB. TANGRAM: A bit-slice block cipher suitable for multiple
platforms. Journal of Cryptologic Research, 2019, 6(6): 727–747 (in Chinese with English abstract). [doi: 10.13868/j.cnki.jcr.000337]
[39] Reis TBS, Aranha DF, López J. PRESENT runs fast: Efficient and secure implementation in software. In: Proc. of the 19th Int’l Conf. on
Cryptographic Hardware and Embedded Systems (CHES 2017). Taipei: Springer, 2017. 644–664. [doi: 10.1007/978-3-319-66787-4_31]
[40] Hamburg M. Accelerating AES with vector permute instructions. In: Proc. of the 11th Int’l Workshop Lausanne Cryptographic Hardware
and Embedded Systems (CHES 2009). Springer, 2009. 18–32. [doi: 10.1007/978-3-642-04138-9_2]
[41] Seo H, Park T, Heo S, Seo G, Bae B, Hu Z, Zhou L, Nogami Y, Zhu YW, Kim H. Parallel implementations of LEA, revisited. In: Proc. of
the 17th Int’l Workshop on Information Security Applications. Jeju Island: Springer, 2017. 318–330. [doi: 10.1007/978-3-319-56549-
1_27]
[42] Park T, Seo H, Lee G, Khandaker MAA, Nogami Y, Kim H. Parallel implementations of SIMON and SPECK, revisited. In: Proc. of
the 18th Int’l Conf. on Information Security Applications. Jeju Island: Springer, 2018. 283–294. [doi: 10.1007/978-3-319-93563-8_24]

