Page 117 - 《软件学报》2020年第9期

2738 Journal of Software 软件学报 Vol.31, No.9, September 2020

数.因为考虑了连续访问数据对的相关度对数据放置进行了改进,同时根据放置进行了指令重调度,所以本文所
提的算法可以到达较好的性能.
6 结 论

本文针对数据密集型应用,面向配备多个读/写头的磁畴壁存储器的单核处理器系统研究最优指令调度与
数据放置方案来获得最少的移动操作次数,以提升磁畴壁存储器的存储访问性能,进而提升系统性能.本文提出
了可以在配备多个读/写头的磁畴壁存储器上生成最优的指令调度和数据放置方案的 ILP 模型,可以求得最小
的移动次数.因为 ILP 模型的时间复杂度呈指数级,本文提出了可以在配备多个读/写头的磁畴壁存储器上,在多
项式时间内生成近似最优的指令调度和数据放置方案(GISDP)的启发式算法,以此来减小移动次数.对配备不
同数量读/写头的磁畴壁存储器的存储访问性能进行设计探索与实验,表明本文所提出的 ILP 模型和 GISDP 算
法能够生成最优和近似最优的指令调度与数据放置方案.
由于研究问题的复杂性,本文主要考虑的是配备多个读/写头的磁畴壁存储器的单核处理器系统,但在实际
用中,多核处理器系统使用更加广泛.在未来的工作中,将会研究配备多个读/写头的磁畴壁存储器的多核处理
器系统中指令调度与数据放置策略,减少移动次数并提高磁畴壁存储器的存储访问性能,进而提高整个体统的
性能.

References:
[1] Yang D, Ren H. The research on the technology of Internet of things and embedded system. In: Proc. of the IEEE Int’l Conf. on
Software Engineering and Service Science (ICSESS). Piscataway: IEEE, 2017. 395−398. [doi: 10.1109/ICSESS.2017.8342940]
[2] Gong XQ, Jin CQ, Wang XL, Zhang R, Zhou AY. Data-Intensive science and engineering: requirements and challenges. Chinese
Journal of Computers, 2012,35(8):1563−1578 (in Chinese with English abstract). [doi: 10.3724/SP.J.1016.2012.01563]
[3] Dias WP, Colonese E. Performance analysis of cache and scratchpad memory in an embedded high performance processor. In: Proc.
of the Int’l Conf. on Information Technology: New Generations (ITNG 2008). Piscataway: IEEE, 2008. 657−661. [doi: 10.1109/
ITNG.2008.226]
[4] Chang DW, Lin IC, Chien YS, Lin CL, Su AWY, Young CP. CASA: Contention-aware scratchpad memory allocation for online
hybrid on-chip memory management. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 2014,33(12):
1806−1817. [doi: 10.1109/TCAD.2014.2363385]
[5] Gu SZ, Sha EHM, Zhuge QF, Chen YR, Hu JT. A time, energy, and area efficient domain wall memory based SPM for embedded
systems. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 2016,35(12):2008−2017. [doi: 10.1109/
TCAD.2016.2547903]
[6] Gu SZ. Task scheduling and data allocation for systems with non-volatile memory [Ph.D.Thesis]. Chongqing: Chongqing
University, 2016 (in Chinese with English abstract).
[7] Wang Z, Gu ZH, Yao M, Shao ZL. Endurance-Aware allocation of data variables on NVM-based scratchpad memory in real-time
embedded systems. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 2015,34(10):1600−1612. [doi:
10.1109/TCAD.2015.2422846]
[8] Mao HY, Zhang C, Sun GY, Shu JW. Exploring data placement in racetrack memory based scratchpad memory. In: Proc. of the
IEEE Non-Volatile Memory System and Applications Symp. (NVMSA). Piscataway: IEEE, 2015. 1−5. [doi: 10.1109/NVMSA.
2015.7304358]
[9] Chen XZ, Sha EHM, Jiang WW, Zhuge QF, Chen JX, Qin JJ, Zeng YS. The design of an efficient swap mechanism for hybrid
DRAM-NVM systems. In: Proc. of the Int’l Conf. on Embedded Software (EMSOFT). New York: ACM, 2016. [doi: 10.1145/
2968478.2968497]
[10] Chen XZ. File systems and swap mechanism for non-volatile memory systems [Ph.D.Thesis]. Chongqing: Chongqing University,
2017 (in Chinese with English abstract).